LM3S6965 Microcontroller

7.1Block Diagram

7.2Functional Description

TheHibernationmodulecontrolsthepowertotheprocessorwithanenablesignal(HIB)thatsignals an external voltage regulator to turn off.

The Hibernation module power source is determined dynamically. The supply voltage of the Hibernation module is the larger of the main voltage source (VDD) or the battery/auxilliary voltage source (VBAT). A voting circuit indicates the larger and an internal power switch selects the appropriate voltage source. The Hibernation module also has a separate clock source to maintain a real-time clock (RTC). Once in hibernation, the module signals an external voltage regulator to turn back on the power when an external pin (WAKE) is asserted, or when the internal RTC reaches a certain value. The Hibernation module can also detect when the battery voltage is low, and optionally prevent hibernation when this occurs.

Power-up from a power cut to code execution is defined as the regulator turn-on time (specified at tHIB_TO_VDD maximum) plus the normal chip POR (see “Hibernation Module” on page 576).

7.2.1Register Access Timing

Because the Hibernation module has an independent clocking domain, certain registers must be writtenonlywithatiminggapbetweenaccesses. ThedelaytimeistHIB_REG_WRITE,thereforesoftware

must guarantee that a delay of tHIB_REG_WRITE is inserted between back-to-back writes to certain Hibernation registers, or between a write followed by a read to those same registers. There is no

restriction on timing for back-to-back reads from the Hibernation module.

Preliminary

Hibernation Module

7.2.2Clock Source

TheHibernationmodulemustbeclockedbyanexternalsource,eveniftheRTCfeatureisnotused. An external oscillator or crystal can be used for this purpose. To use a crystal, a 4.194304-MHz crystal is connected to the XOSC0 and XOSC1 pins. This clock signal is divided by 128 internally to produce the 32.768-kHz clock reference. For an alternate clock source, a 32.768-kHz oscillator can be connected to the XOSC0 pin. See Figure 7-2 on page 134 and Figure 7-3 on page 135. Note that these diagrams only show the connection to the Hibernation pins and not to the full system. See “Hibernation Module” on page 576 for specific values.

The clock source is enabled by setting the CLK32EN bit of the HIBCTL register. The type of clock source is selected by setting the CLKSEL bit to 0 for a 4.194304-MHz clock source, and to 1 for a 32.768-kHz clock source. If the bit is set to 0, the 4.194304-MHz input clock is divided by 128, resulting in a 32.768-kHz clock source. If a crystal is used for the clock source, the software must

leave a delay of tXOSC_SETTLE after setting the CLK32EN bit and before any other accesses to the Hibernation module registers. The delay allows the crystal to power up and stabilize. If an oscillator

is used for the clock source, no delay is needed.

Note: X1 = Crystal frequency is fXOSC_XTAL.

C1,2 = Capacitor value derived from crystal vendor load capacitance specifications.

RL = Load resistor is RXOSC_LOAD.

RPU = Pull-up resistor (1 M½).

See “Hibernation Module” on page 576 for specific parameter values.

Preliminary

LM3S6965 Microcontroller

Figure 7-3. Clock Source Using Dedicated Oscillator

Note: RPU = Pull-up resistor (1 M½).

7.2.3Battery Management

The Hibernation module can be independently powered by a battery or an auxiliary power source. The module can monitor the voltage level of the battery and detect when the voltage drops below

VLOWBAT. When this happens, an interrupt can be generated. The module can also be configured so that it will not go into Hibernate mode if the battery voltage drops below this threshold. Battery

voltage is not measured while in Hibernate mode.

Important: System level factors may affect the accuracy of the low battery detect circuit. The designer should consider battery type, discharge characteristics, and a test load during battery voltage measurements.

NotethattheHibernationmoduledrawspowerfromwhicheversource(VBAT or VDD)hasthehigher voltage. Therefore, it is important to design the circuit to ensure that VDD is higher that VBAT under nominal conditions or else the Hibernation module draws power from the battery even when VDD is available.

TheHibernationmodulecanbeconfiguredtodetectalowbatteryconditionbysettingthe LOWBATEN bit of the HIBCTL register. In this configuration, the LOWBAT bit of the HIBRIS register will be set whenthebatterylevelislow. Ifthe VABORT bitisalsoset,thenthemoduleispreventedfromentering Hibernation mode when a low battery is detected. The module can also be configured to generate an interrupt for the low-battery condition (see “Interrupts and Status” on page 137).

7.2.4Real-Time Clock

The Hibernation module includes a 32-bit counter that increments once per second with a proper clock source and configuration (see “Clock Source” on page 134). The 32.768-kHz clock signal is fed into a predivider register which counts down the 32.768-kHz clock ticks to achieve a once per secondclockratefortheRTC. Theratecanbeadjustedtocompensateforinaccuraciesintheclock sourcebyusingthepredividertrimregister, HIBRTCT. Thisregisterhasanominalvalueof0x7FFF, andisusedforonesecondoutofevery64secondstodividetheinputclock. Thisallowsthesoftware to make fine corrections to the clock rate by adjusting the predivider trim register up or down from 0x7FFF. The predivider trim should be adjusted up from 0x7FFF in order to slow down the RTC rate, and down from 0x7FFF in order to speed up the RTC rate.

Preliminary

Hibernation Module

The Hibernation module includes two 32-bit match registers that are compared to the value of the RTC counter. The match registers can be used to wake the processor from hibernation mode, or to generate an interrupt to the processor if it is not in hibernation.

The RTC must be enabled with the RTCEN bit of the HIBCTL register. The value of the RTC can be set at any time by writing to the HIBRTCLD register. The predivider trim can be adjusted by reading andwritingthe HIBRTCT register. Thepredividerusesthisregisteronceevery64secondstoadjust the clock rate. The two match registers can be set by writing to the HIBRTCM0 and HIBRTCM1 registers. The RTC can be configured to generate interrupts by using the interrupt registers (see “Interrupts and Status” on page 137).

7.2.5Non-Volatile Memory

The Hibernation module contains 64 32-bit words of memory which are retained during hibernation. Thismemoryispoweredfromthebatteryorauxiliarypowersupplyduringhibernation. Theprocessor software can save state information in this memory prior to hibernation, and can then recover the state upon waking. The non-volatile memory can be accessed through the HIBDATA registers.

7.2.6Power Control

Important: The Hibernation Module requires special system implementation considerations when using HIB to control power, as it is intended to power-down all other sections of its host device. All system signals and power supplies that connect to the chip must be driven to 0 VDC or powered down with the same regulator controlled by HIB. See “Hibernation Module” on page 576 for more details.

The Hibernation module controls power to the microcontroller through the use of the HIB pin. This pin is intended to be connected to the enable signal of the external regulator(s) providing 3.3 V and/or 2.5 V to the microcontroller. When the HIB signal is asserted by the Hibernation module, the external regulator is turned off and no longer powers the system. The Hibernation module remains powered from the VBAT supply (which could be a battery or an auxiliary power source) until a Wake event. Power to the device is restored by deasserting the HIB signal, which causes the external regulator to turn power back on to the chip.

7.2.7Initiating Hibernate

Hibernation mode is initiated by the microcontroller setting the HIBREQ bit of the HIBCTL register. Prior to doing this, a wake-up condition must be configured, either from the external WAKE pin, or by using an RTC match.

The Hibernation module is configured to wake from the external WAKE pin by setting the PINWEN bitofthe HIBCTL register. ItisconfiguredtowakefromRTCmatchbysettingthe RTCWEN bit. Either one or both of these bits can be set prior to going into hibernation. The WAKE pin includes a weak internal pull-up. Note that both the HIB and WAKE pins use the Hibernation module's internal power supply as the logic 1 reference.

WhentheHibernationmodulewakes,themicrocontrollerwillseeanormalpower-onreset. Software can detect that the power-on was due to a wake from hibernation by examining the raw interrupt statusregister(see“InterruptsandStatus”onpage137)andbylookingforstatedatainthenon-volatile memory (see “Non-Volatile Memory” on page 136).

When the HIB signal deasserts, enabling the external regulator, the external regulator must reach the operating voltage within tHIB_TO_VDD.

Preliminary