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LM3S6965 Microcontroller

18 Pulse Width Modulator (PWM)

Pulse width modulation (PWM) is a powerful technique for digitally encoding analog signal levels. High-resolution counters are used to generate a square wave, and the duty cycle of the square waveismodulatedtoencodeananalogsignal. Typicalapplicationsincludeswitchingpowersupplies and motor control.

TheStellaris® PWMmoduleconsistsofthreePWMgeneratorblocksandacontrolblock. Thecontrol blockdeterminesthepolarityofthePWMsignals,andwhichsignalsarepassedthroughtothepins.

Each PWM generator block produces two PWM signals that can either be independent signals (other than being based on the same timer and therefore having the same frequency) or a single pair of complementary signals with dead-band delays inserted. The output of the PWM generation blocks are managed by the output control block before being passed to the device pins.

The Stellaris® PWM module provides a great deal of flexibility. It can generate simple PWM signals, such as those required by a simple charge pump. It can also generate paired PWM signals with dead-band delays, such as those required by a half-H bridge driver. Three generator blocks can also generate the full six channels of gate controls required by a 3-phase inverter bridge.

Each Stellaris® PWM module has the following features:

Three PWM generator blocks, each with one 16-bit counter, two PWM comparators, a PWM signal generator, a dead-band generator, and an interrupt/ADC-trigger selector

One 16-bit counter

Runs in Down or Up/Down mode

Output frequency controlled by a 16-bit load value

Load value updates can be synchronized

Produces output signals at zero and load value

Two PWM comparators

Comparator value updates can be synchronized

Produces output signals on match

PWM generator

Output PWM signal is constructed based on actions taken as a result of the counter and PWM comparator output signals

Produces two independent PWM signals

Dead-band generator

ProducestwoPWMsignalswithprogrammabledead-banddelayssuitablefordrivingahalf-H bridge

Can be bypassed, leaving input PWM signals unmodified

Flexible output control block with PWM output enable of each PWM signal

November 16, 2008

485

Preliminary

Pulse Width Modulator (PWM)

PWM output enable of each PWM signal

Optional output inversion of each PWM signal (polarity control)

Optional fault handling for each PWM signal

Synchronization of timers in the PWM generator blocks

Synchronization of timer/comparator updates across the PWM generator blocks

Interrupt status summary of the PWM generator blocks

Can initiate an ADC sample sequence

18.1Block Diagram

Figure18-1onpage486providestheStellaris® PWMmoduleunitdiagramandFigure18-2onpage 487 provides a more detailed diagram of a Stellaris® PWM generator. The LM3S6965 controller contains three generator blocks (PWM0, PWM1, and PWM2) and generates six independent PWM signals or three paired PWM signals with dead-band delays inserted.

Figure 18-1. PWM Unit Diagram

PWM Clock

 

 

Fault

 

PWM

 

 

System Clock

Control and

Generator 0

 

 

 

Status

 

 

PWMCTL

 

 

PWMSYNC

 

 

PWMSTATUS

PWM

 

 

 

 

Generator 1

 

Interrupt

 

Interrupts

PWMINTEN

PWM

PWMRIS

 

Generator 2

 

PWMISC

 

 

Triggers

 

 

 

Output

 

 

PWMENABLE

 

 

PWMINVERT

 

 

PWMFAULT

 

PWM0_A

PWM0_B

PWM0_Fault

PWM1_A

PWM1_B

PWM1_Fault

PWM2_A

PWM2_B

PWM2_Fault

PWM 0

PWM 1

PWM

PWM 2

Output

PWM 3

Control

Logic

PWM 4

PWM 5

486

November 16, 2008

Preliminary

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