4.2.5PIN DESCRIPTIONS AND DIAGRAMS

Each GPIO pin is multiplexed with other functions. The pins and their combined functions are briefly described here. For specific information about individual functions such as the comparator or the ADC, refer to the appropriate section in this data sheet.

4.2.5.1GP0/AN0/CIN+/ICSPDAT/ULPWU

Figure 4-1 shows the diagram for this pin. The GP0 pin is configurable to function as one of the following:

•a general purpose I/O

•an analog input for the ADC

•an analog input to the comparator

•In-Circuit Serial Programming™ data

•an analog input to the Ultra Low-Power Wake-up

4.2.5.2GP1/AN1/CIN-/VREF/ICSPCLK

Figure 4-2 shows the diagram for this pin. The GP1 pin is configurable to function as one of the following:

•a general purpose I/O

•an analog input for the ADC

•a analog input to the comparator

•a voltage reference input for the ADC

•In-Circuit Serial Programming clock

FIGURE 4-2: BLOCK DIAGRAM OF GP1

4.2.5.3GP2/AN2/T0CKI/INT/COUT/CCP1

Figure 4-3 shows the diagram for this pin. The GP2 pin is configurable to function as one of the following:

•a general purpose I/O

•an analog input for the ADC

•the clock input for Timer0

•an external edge triggered interrupt

•a digital output from the Comparator

•a digital input/output for the CCP (refer to

Section 11.0 “Capture/Compare/PWM (CCP)

To Timer0

To INT

To A/D Converter

Note 1: Comparator mode and ANSEL determines Analog Input mode.

4.2.5.4GP3/MCLR/VPP

Figure 4-4 shows the diagram for this pin. The GP3 pin is configurable to function as one of the following:

•a general purpose input

•as Master Clear Reset with weak pull-up

FIGURE 4-4: BLOCK DIAGRAM OF GP3

4.2.5.5GP4/AN3/T1G/OSC2/CLKOUT

Figure 4-5 shows the diagram for this pin. The GP4 pin is configurable to function as one of the following:

•a general purpose I/O

•an analog input for the ADC

•a Timer1 gate input

•a crystal/resonator connection

•a clock output

FIGURE 4-5: BLOCK DIAGRAM OF GP4

Note 1: CLK modes are XT, HS, LP, optional LP oscillator and CLKOUT Enable.

2: With CLKOUT option.

4.2.5.6GP5/T1CKI/OSC1/CLKIN

Figure 4-6 shows the diagram for this pin. The GP5 pin is configurable to function as one of the following:

•a general purpose I/O

•a Timer1 clock input

•a crystal/resonator connection

•a clock input

FIGURE 4-6: BLOCK DIAGRAM OF GP5

Note 1: Timer1 LP oscillator enabled.

2:When using Timer1 with LP oscillator, the Schmitt Trigger is bypassed.