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Features

High Performance, Low Power Atmel® AVR® 8-Bit Microcontroller

Advanced RISC Architecture

135 Powerful Instructions – Most Single Clock Cycle Execution

32 × 8 General Purpose Working Registers

Fully Static Operation

Up to 16 MIPS Throughput at 16MHz

On-Chip 2-cycle Multiplier

High Endurance Non-volatile Memory Segments

64K/128K/256KBytes of In-System Self-Programmable Flash

4Kbytes EEPROM

8Kbytes Internal SRAM

Write/Erase Cycles:10,000 Flash/100,000 EEPROM

Data retention: 20 years at 85°C/ 100 years at 25°C

Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

Programming Lock for Software Security

Endurance: Up to 64Kbytes Optional External Memory Space

Atmel® QTouch® library support

Capacitive touch buttons, sliders and wheels

QTouch and QMatrix® acquisition

Up to 64 sense channels

JTAG (IEEE std. 1149.1 compliant) Interface

Boundary-scan Capabilities According to the JTAG Standard

Extensive On-chip Debug Support

Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

Peripheral Features

Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

Four 16-bit Timer/Counter with Separate Prescaler, Compareand Capture Mode

Real Time Counter with Separate Oscillator

Four 8-bit PWM Channels

Six/Twelve PWM Channels with Programmable Resolution from 2 to 16 Bits (ATmega1281/2561, ATmega640/1280/2560)

Output Compare Modulator

8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560)

Two/Four Programmable Serial USART (ATmega1281/2561, ATmega640/1280/2560)

Master/Slave SPI Serial Interface

Byte Oriented 2-wire Serial Interface

Programmable Watchdog Timer with Separate On-chip Oscillator

On-chip Analog Comparator

Interrupt and Wake-up on Pin Change

Special Microcontroller Features

Power-on Reset and Programmable Brown-out Detection

Internal Calibrated Oscillator

External and Internal Interrupt Sources

Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby

I/O and Packages

54/86 Programmable I/O Lines (ATmega1281/2561, ATmega640/1280/2560)

64-pad QFN/MLF, 64-lead TQFP (ATmega1281/2561)

100-lead TQFP, 100-ball CBGA (ATmega640/1280/2560)

RoHS/Fully Green

Temperature Range:

-40°C to 85°C Industrial

Ultra-Low Power Consumption

Active Mode: 1MHz, 1.8V: 500µA

Power-down Mode: 0.1µA at 1.8V

Speed Grade:

ATmega640V/ATmega1280V/ATmega1281V:

0 - 4MHz @ 1.8V - 5.5V, 0 - 8MHz @ 2.7V - 5.5V

ATmega2560V/ATmega2561V:

0 - 2MHz @ 1.8V - 5.5V, 0 - 8MHz @ 2.7V - 5.5V

ATmega640/ATmega1280/ATmega1281:

0 - 8MHz @ 2.7V - 5.5V, 0 - 16MHz @ 4.5V - 5.5V

ATmega2560/ATmega2561:

0 - 16MHz @ 4.5V - 5.5V

8-bit Atmel

Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash

ATmega640/V

ATmega1280/V

ATmega1281/V

ATmega2560/V

ATmega2561/V

2549P–AVR–10/2012

ATmega640/1280/1281/2560/2561

1. Pin Configurations

Figure 1-1. TQFP-pinout ATmega640/1280/2560

 

 

 

 

 

 

(OC0B) PG5

1

 

 

 

(RXD0/PCINT8) PE0

2

 

 

(TXD0) PE1

 

 

 

3

(XCK0/AIN0) PE2

 

4

(OC3A/AIN1) PE3

 

5

(OC3B/INT4) PE4

 

6

(OC3C/INT5) PE5

 

7

 

(T3/INT6) PE6

 

 

8

(CLKO/ICP3/INT7) PE7

 

9

 

 

 

 

 

 

VCC

10

 

 

 

 

 

 

GND

11

 

 

(RXD2) PH0

 

 

 

12

 

 

(TXD2) PH1

 

 

 

13

 

 

 

 

 

 

(XCK2) PH2

14

 

 

(OC4A) PH3

 

 

 

15

 

 

(OC4B) PH4

 

 

 

16

 

 

(OC4C) PH5

 

 

 

17

 

 

 

 

 

 

(OC2B) PH6

18

 

 

 

 

 

 

 

 

(SS/PCINT0) PB0

19

(SCK/PCINT1) PB1

 

20

(MOSI/PCINT2) PB2

 

21

(MISO/PCINT3) PB3

 

22

(OC2A/PCINT4) PB4

 

23

(OC1A/PCINT5) PB5

 

24

(OC1B/PCINT6) PB6

 

25

 

 

 

 

AVCC

GND

 

AREF

 

PF0(ADC0)

 

PF1(ADC1)

 

PF2(ADC2)

 

PF3(ADC3)

 

PF4(ADC4/TCK)

 

PF5(ADC5/TMS)

 

PF6(ADC6/TDO)

 

PF7(ADC7/TDI)

 

PK0(ADC8/PCINT16)

 

PK1(ADC9/PCINT17)

 

PK2(ADC10/PCINT18)

 

PK3(ADC11/PCINT19)

 

PK4(ADC12/PCINT20)

 

PK5(ADC13/PCINT21)

 

PK6(ADC14/PCINT22)

 

PK7(ADC15/PCINT23)

 

GND

 

VCC

 

PJ7

 

PA0(AD0)

 

PA1(AD1)

 

PA2(AD2)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100

 

99

 

98

 

97

 

96

 

95

 

94

 

93

 

92

 

91

 

90

 

89

 

88

 

87

 

86

 

85

 

84

 

83

 

82

 

81

 

80

 

79

 

78

 

77

 

76

INDEX CORNER

26

 

27

 

28

 

29

 

 

30

 

31

 

32

 

33

 

34

 

35

 

36

 

37

 

38

 

39

 

40

 

41

 

42

 

43

 

44

 

45

 

46

 

47

 

48

 

49

 

50

(OC0A/OC1C/PCINT7)PB7

 

(T4)PH7

(TOSC2)PG3

 

(TOSC1)PG4

 

 

RESET

VCC

 

GND

 

XTAL2

 

XTAL1

(ICP4)PL0

(ICP5)PL1

 

(T5)PL2

 

(OC5A)PL3

 

(OC5B)PL4

 

(OC5C)PL5

 

PL6

 

PL7

 

(SCL/INT0)PD0

 

(SDA/INT1)PD1

 

(RXD1/INT2)PD2

 

(TXD1/INT3)PD3

 

(ICP1)PD4

 

(XCK1)PD5

 

(T1)PD6

 

(T0)PD7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

75

PA3 (AD3)

 

PA4 (AD4)

74

 

PA5 (AD5)

73

 

PA6 (AD6)

72

 

PA7 (AD7)

71

 

PG2 (ALE)

70

 

 

 

 

 

69

PJ6 (PCINT15)

 

 

 

 

 

68

PJ5 (PCINT14)

 

 

 

 

 

67

PJ4 (PCINT13)

 

 

 

 

 

66

PJ3 (PCINT12)

 

 

 

 

 

65

PJ2 (XCK3/PCINT11)

 

PJ1 (TXD3/PCINT10)

64

 

PJ0 (RXD3/PCINT9)

63

 

 

 

 

 

62

GND

 

VCC

61

 

 

 

 

 

60

PC7 (A15)

 

PC6 (A14)

59

 

PC5 (A13)

58

 

PC4 (A12)

 

57

 

PC3 (A11)

56

 

PC2 (A10)

55

 

PC1 (A9)

54

 

PC0 (A8)

53

 

 

 

 

 

52

PG1

(RD)

 

 

PG0

 

 

 

51

(WR)

 

 

 

 

 

 

2

2549P–AVR–10/2012

ATmega640/1280/1281/2560/2561

Figure 1-2. CBGA-pinout ATmega640/1280/2560

1

 

 

Top view

 

 

 

 

 

 

Bottom view

 

 

1

2

3

4

5

6

7

8

9

10

10

9

8

7

6

5

4

3

2

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C

D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D

E

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E

F

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F

G

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

G

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

J

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J

K

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

K

Table 1-1.

CBGA-pinout ATmega640/1280/2560

 

 

 

 

 

 

1

 

2

3

4

5

6

7

8

9

10

 

 

 

 

 

 

 

 

 

 

 

 

A

GND

 

AREF

PF0

PF2

PF5

PK0

PK3

PK6

GND

VCC

 

 

 

 

 

 

 

 

 

 

 

 

B

AVCC

 

PG5

PF1

PF3

PF6

PK1

PK4

PK7

PA0

PA2

 

 

 

 

 

 

 

 

 

 

 

 

C

PE2

 

PE0

PE1

PF4

PF7

PK2

PK5

PJ7

PA1

PA3

 

 

 

 

 

 

 

 

 

 

 

 

D

PE3

 

PE4

PE5

PE6

PH2

PA4

PA5

PA6

PA7

PG2

 

 

 

 

 

 

 

 

 

 

 

 

E

PE7

 

PH0

PH1

PH3

PH5

PJ6

PJ5

PJ4

PJ3

PJ2

 

 

 

 

 

 

 

 

 

 

 

 

F

VCC

 

PH4

PH6

PB0

PL4

PD1

PJ1

PJ0

PC7

GND

 

 

 

 

 

 

 

 

 

 

 

 

G

GND

 

PB1

PB2

PB5

PL2

PD0

PD5

PC5

PC6

VCC

 

 

 

 

 

 

 

 

 

 

 

 

H

PB3

 

PB4

RESET

PL1

PL3

PL7

PD4

PC4

PC3

PC2

 

 

 

 

 

 

 

 

 

 

 

 

J

PH7

 

PG3

PB6

PL0

XTAL2

PL6

PD3

PC1

PC0

PG1

 

 

 

 

 

 

 

 

 

 

 

 

K

PB7

 

PG4

VCC

GND

XTAL1

PL5

PD2

PD6

PD7

PG0

 

 

 

 

 

 

 

 

 

 

 

Note:

The functions for each pin is the same as for the 100 pin packages shown in Figure 1-1 on page 2.

3

2549P–AVR–10/2012

ATmega640/1280/1281/2560/2561

Figure 1-3. Pinout ATmega1281/2561

 

AVCC

 

GND

 

AREF

 

PF0(ADC0)

 

PF1(ADC1)

 

PF2(ADC2)

 

PF3(ADC3)

 

PF4(ADC4/TCK)

 

PF5(ADC5/TMS)

 

PF6(ADC6/TDO)

 

PF7(ADC7/TDI)

 

GND

 

VCC

 

PA0(AD0)

 

PA1(AD1)

 

PA2(AD2)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

64

 

63

 

62

 

61

 

60

 

59

 

58

 

57

 

56

 

55

 

54

 

53

 

52

 

51

 

50

 

49

 

 

 

(OC0B) PG5

1

 

 

 

 

(RXD0/PCINT8/PDI) PE0

2

 

 

 

 

 

 

 

 

(TXD0/PDO) PE1

3

 

 

 

 

(XCK0/AIN0) PE2

4

(OC3A/AIN1) PE3

5

 

 

 

 

(OC3B/INT4) PE4

6

 

 

 

 

 

 

 

 

(OC3C/INT5) PE5

7

 

 

 

 

 

 

 

 

 

(T3/INT6) PE6

8

 

 

 

 

 

 

 

 

(ICP3/CLKO/INT7) PE7

9

 

 

 

 

 

 

 

 

(SS/PCINT0) PB0

10

 

 

 

 

 

 

 

 

(SCK/PCINT1) PB1

11

 

 

 

 

 

 

 

 

(MOSI/ PCINT2) PB2

12

 

 

 

 

 

 

 

 

(MISO/ PCINT3) PB3

13

 

 

 

 

 

 

 

 

(OC2A/ PCINT4) PB4

14

 

 

 

 

 

 

 

 

(OC1A/PCINT5) PB5

15

 

 

 

 

 

 

 

 

(OC1B/PCINT6) PB6

16

 

 

 

 

INDEX CORNER

17

 

18

 

19

 

 

20

 

21

 

22

 

23

 

24

 

25

 

26

 

27

 

28

 

29

 

30

 

31

 

32

(OC0A/OC1C/PCINT7)PB7

 

(TOSC2)PG3

 

(TOSC1)PG4

 

 

RESET

 

VCC

 

GND

 

XTAL2

 

XTAL1

 

(SCL/INT0)PD0

 

(SDA/INT1)PD1

 

(RXD1/INT2)PD2

 

(TXD1/INT3)PD3

 

(ICP1)PD4

 

(XCK1)PD5

 

(T1)PD6

(T0)PD7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

48 PA3 (AD3)

47 PA4 (AD4)

46 PA5 (AD5)

45 PA6 (AD6)

44 PA7 (AD7)

43 PG2 (ALE)

42 PC7 (A15)

41 PC6 (A14)

40 PC5 (A13)

39 PC4 (A12)

38 PC3 (A11)

37 PC2 (A10)

36 PC1 (A9)

35 PC0 (A8)

34 PG1 (RD)

33 PG0 (WR)

Note: The large center pad underneath the QFN/MLF package is made of metal and internally connected to GND. It should be soldered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen from the board.

4

2549P–AVR–10/2012

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