4. Pattern Transfer

Once a variable height photoresist structure is created, it is subsequently used as a mask during a plasma-etching step to transfer the pattern into the underlying substrate material. For shallow structures (<10pm), reactive ion etching (RIE) can be used, while for deeper structures in silicon, deep reactive ion etching (DRIE) has become the dominant technique. The following sections will describe the basic DRIE process and how the gray-scale pattern is transferred into silicon. A detailed etch selectivity characterization for controlling the amplification of the photoresist structure into the final 3-D silicon structure will be presented.

1. Deep Reactive Ion Etching (drie)

Robert Bosch GmbH established the basic DRIE process in 1996 [99], where

cycles of etching and passivation are used to create deep, vertical, high aspect ratio features in silicon. Much research has been done regarding the various processes at work in the plasma, including [34, 100-107], so the basic operation is only briefly summarized below. The remaining focus will be on its application to gray-scale pattern transfer.

The starting material is typically a silicon wafer patterned with a masking material such as photoresist or silicon dioxide. A short etching step is first executed using an inductively coupled plasma (ICP) containing SF₆ (and sometimes Ar or O₂ gases). This etch is relatively vertical over small depths (usually <1^m), however there will be a limited amount of isotropic lateral etching of the silicon. A passivation step follows, where C₄F₈ gas is cycled into the chamber to create a conformal teflon-like film over the entire surface. When the etching step is repeated, the passivation layer is preferentially removed from horizontal surfaces by charged ions in the plasma, allowing vertical etching to continue. Simultaneously, this passivation layer temporarily protects the silicon sidewall from further etching by F ions and radicals. Etch and passivation steps are cycled until a desired etch depth is achieved in the silicon, resulting in a deep vertical etch with slight scalloping on the sidewalls, as shown in Figure 2.12. Etch rates of 1- 5p,m per minute are achievable.

During the DRIE process, the masking material is simultaneously etched along with the substrate. However, the etch rate of the masking material, in our case photoresist, is many times lower than the etch rate of silicon. This ratio of the silicon to photoresist etch rates is referred to as the ‘etch selectivity.’ Etch selectivity for a photoresist mask is typically around 60 to 1, usually written as 60:1 or just 60. Whitley et al [6] briefly demonstrated and received a patent on the transfer of gray-scale structures into silicon using DRIE in 2002, showing simply that tuning the cycle times could produce sidewall facets with sufficient quality for their optical devices. However, full characterization of the etch selectivity within a DRIE system is required for gray-scale technology as the difference in the etch rates between the two materials amplifies the vertical dimensions of each gray-scale structure.

Figure 2.13 shows an example photoresist wedge on a silicon substrate. As this wedge is etched in a DRIE process, any exposed silicon will etch quickly, while the photoresist nested mask etches more slowly (the photoresist is primarily etched by ion bombardment). As the etch proceeds, the photoresist wedge will slowly recede, exposing more silicon to the high etch rate plasma. The transferred gray-scale structure will retain its original horizontal dimensions, while the vertical dimensions are amplified by the etch

selectivity. Therefore, etch selectivity control is an absolute necessity for the fabrication of precise 3D structures in silicon.