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computer organization and architecture.rtf
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  1. What’s a system’s structure?

    • It is the way of merging (uniting) components of some subsystem in one (whole) unit.

    • It is the hardware and three subroutines that realize the access to the computer system.

    • It is the operational programs and their subroutines that realize the access to the computer system.

    • It is the software and some subroutines that realize the access to the computer system.

    • It is the set of drivers of programs and their subroutines that realize the access to the computer system.

  1. What’s the computer performance?

    • It is determined by volume of certain (well-known) Cache memory stored per unit of time.

    • It is determined by number of certain (well-known) operations per unit of time.

    • It is determined by volume of certain (well-known) CMOS memory stored per unit of time.

    • It is determined by volume of certain (well-known) memory stored per unit of time.

    • It is determined by width of certain (well-known) network used per unit of time.

  1. What is the Main Instruction Cycle (without interrupts)?

    • The processing required for a single instruction (consisting of two phases: fetch phase and execute phase).

    • The hardware required for the transporting instruction (consisting of one phase: decomposition).

    • The software required for the modification of instruction (consisting of two parts: name and surname).

    • The apparatus required for the transporting instruction (consisting of one phase: dislocation).

    • The hardware interfaces for the protecting instruction (consisting of one device: clock).

  1. What is Interrupt?

    • A repeating of a process, such as the restart a computer program, and performing it faster by changing algorithm.

    • A prediction of a program execution fail, such as return a computer program, and performing it by changing type of memory.

    • A restart of a process, such as the reloading a computer program, and performing it faster by changing mode of addressing.

    • A modification of a process, such as the restart a computer program, and performing it faster by changing operating system.

    • A suspension of a process, such as the execution of a computer program, caused by an event external to that process, and performed in such a way that the process can be resumed.

  1. Does the user program has to contain some special code to accommodate interrupts?

    • The user program must contain a universal code to accommodate interrupts.

    • The user program must contain a secrete code to accommodate interrupts.

    • The user program must contain BCD code to accommodate interrupts.

    • The user program does not have to contain any special code to accommodate interrupts.

    • The user program must contain a hidden code to accommodate interrupts.

  1. Which hardware devices or software programs are responsible for interrupts accommodation?

    • The processor and the operating system are responsible for suspending the user program and the resuming it at the same point.

    • The DMA controller and the Memory system are responsible for suspending the user program and the resuming it at the same point.

    • The Keyboard and the operating unit are responsible for suspending the user program and the resuming it at the same point.

    • The monitor and the user system are responsible for suspending the user program and the resuming it at the same point.

    • The printer and the network system are responsible for suspending the user program and the resuming it at the same point.

  1. Which of the operation will be done by the processor first of all if interrupt is pending?

    • The processor saves instruction for execution of the interesting program and modifies its context.

    • The processor suspends execution of the current program and saves its context.

    • The processor changes instruction for execution of the internal program and saves its results.

    • The processor sends instruction for execution of the next program and saves its context.

    • The processor inverts instruction for execution of the intranet program and corrects its results.

  1. Which approaches can be taken to dealing with multiple interrupts?

    • Sequential interrupts processing and Nested interrupts processing.

    • Discrete interrupts processing and Analogous interrupts processing.

    • Binary interrupts processing and decimal interrupts processing.

    • Even interrupts processing and Odd interrupts processing.

    • Network interrupts processing and Keyboard interrupts processing.

  1. What is an Interrupt Cycle?

    • The set of wires, which is added to the System Bus Cycle and required for the protection interrupts, is an Interrupt Cycle.

    • The set of data, which is added to the Bus Cycle and required for preservation interrupts, is an Interrupt Cycle.

    • The set of programs, which is added to the PCI Bus Cycle and required for preparation interrupts, is an Interrupt Cycle.

    • The set of gates, which is added to the Bus Cycle and required for reducing interrupts, is an Interrupt Cycle.

    • The processing, which is added to the Main Instruction Cycle and required for accommodation interrupts, is an Interrupt Cycle.

  1. Which forms of input and output are needed for Memory module for all possible types of data exchanges with other modules?

    • Input contacts: Set and Reset operations; Address processing; Interrupts generation. Output contacts: Instruction modification.

    • Input contacts: Read and Write operations; Address Reception; Data Reception. Output contacts: Data Sending.

    • Input contacts: Even and Odd operations; Address correction; Interrupts generation. Output contacts: Instruction modification.

    • Input contacts: Numeric and Binary operations; Logical Address processing; Interrupts fabrication. Output contacts: Instruction modification.

    • Input contacts: Decimal and Binary operations; Logical subroutines processing; Interrupts registration. Output contacts: Instruction prediction.

  1. Which forms of input and output are needed for CPU for all possible types of data exchanges with other modules?

    • Input contacts: Instructions; Data Reception; Interrupt Signals Output contacts: Internal Data Sending; Control Signals.

    • Input contacts: Even hexadecimal and odd binary operations; Address protection; Interrupts arbitration. Output contacts: Instruction calculation.

    • Input contacts: Keyboard Set and Printer Reset operations; Address restoration; Interrupts emulation. Output contacts: Instruction modification.

    • Input contacts: Numeric and Binary operations; Logical Address processing; Interrupts fabrication. Output contacts: Instruction modification.

    • Input contacts: Alphanumeric and BCD operations; Logical Address processing; Interrupts specification. Output contacts: Instruction fabrication.

  1. What’s a bus?

    • A bus is a number of instructions, which regulates communication pathways and service mechanic devices (framing), which guaranty with information integrity.

    • A bus is a number of procedures, which protects communication pathway and services hidden devices (framing) which guaranty with information accuracy.

    • A bus is a number of programs, which organizes communication pathway and services hidden devices (framing) which guaranty with information security.

    • A bus is a set of electric communication pathways and service electronic devices (framing) which provide with information exchange two or more devices.

    • A bus is a special software, which predicts communication pathway and service hidden devices (framing) which guaranty with information importance.

  1. What does the width of the data lines (bus) characterize?

    • It characterizes the validity of data transferred in each unit, and it’s a key factor, which determines correctness.

    • It characterizes the probability of data destruction, which transferred, and it’s a key factor, which determines Cache efficiency.

    • It characterizes the quality of data transferred in each bit, and it’s a key factor, which determines computer prize.

    • It characterizes the propagation of data, which transferred, and it’s a key factor, which determines Hard Disk efficiency.

    • It characterizes the volume of data transferred for the unit of time, and it’s a key factor, which determines computer performance.

  1. What does the width of the Address lines (bus) determine?

    • It determines the minimum possible network capacity of the system.

    • It determines the maximum possible memory capacity of the system.

    • It determines the maximum possible contacts with external systems.

    • It determines the maximum possible RAID massifs of the system.

    • It determines the possible Operational System efficiency and accuracy.

  1. What’s the functional predestination of the Control bus?

    • It is used to control the access to and the use of the coaxial lines.

    • It is used to control the access to and the use of the Data and Address lines.

    • It is used to control the access to and the use of the twisted pairs lines.

    • It is used to control the access to and the use of the Cache Memory.

    • It is used to control the access to and the use of the Stack Register.

  1. What is the width of a bus?

    • It’s a number of instructions in a bus procedure.

    • It’s a number of subroutines in a bus procedure.

    • It’s a number of lines in a bus.

    • It’s a number of jumps in a bus procedure.

    • It’s a number of loops in a bus procedure.

  1. Which of the given types of buses are used in contemporary computers?

    • Dedicated; Multiplexed; Physically dedicated.

    • Digital; Numeric; Analogues.

    • Discrete; Numeric; Analogues.

    • Digital; Binary; Analogues.

    • Decimal; Numeric; Analogues.

  1. What’s timing?

    • It refers to the way in which programs are loaded into the Cache.

    • It refers to the way in which events are coordinated in time on the bus.

    • It refers to the way in which instructions are fetched from the bus.

    • It refers to the way in which bits tested on the Hard Disks’ tracks.

    • It refers to the way in which bits tested on the Hard Disks’ cylinders.

  1. What’s Asynchronous Timing?

    • A technique, which determines the way in which bits tested on the Hard Disks’ tracks.

    • A technique, which determines the way in which instructions are fetched from the Keyboard.

    • A technique, which determines the way in which programs are loaded into the CMOS.

    • A technique in which occurrence of one event on a bus follows and depends on the occurrence of a previous event.

    • A technique, which determines the way in which programs are loaded into the Cache.

  1. Which methods of bus Arbitration are used now?

    • 1.Binary;2. Delivered.

    • 1.Numeric;2. Digitized.

    • 1. Centralized;2. Distributed.

    • 1.Logical;2. Semiconductor.

    • 1.Discrete;2. Symbolic.

  1. Which types of data transfer are supported by contemporary buses?

    • Return; Write; Read-modify-Write; Read-after-Write; Block.

    • Repeat; Write; Read-modify-Write; Read-after-Write; Block.

    • Read; Write; Read-modify-Write; Read-after-Write; Block.

    • Recognize; Write; Read-modify-Write; Read-after-Write; Block.

    • Rewrite; Write; Read-modify-Write; Read-after-Write; Block.

  1. What’s a transaction on the PCI bus?

    • Numerical, but not every data processing and storing on the PCI bus is a transaction consisting of only two address phases and only one data phase.

    • Every data transfer on the PCI bus is a transaction consisting of only one address phase and one or more data phases.

    • Special data processing and storing on the PCI bus is a transaction consisting of only two address phases and only one data phase.

    • Digital data processing and storing on the PCI bus is a transaction consisting of only two address phases and only one data phase.

    • Every data processing and storing on the PCI bus is a transaction consisting of only two address phases and only one data phase.

  1. What’s a bus skew phenomenon?

    • Bus skew is such a situation, when several files simultaneously transmitted from one and the same Hard Disk arrive at the Monitor at the same moment.

    • Bus skew is such a procedure, when several loops simultaneously transmitted from one and the same Accumulator arrive at the destination at the same moment.

    • Bus skew is such a phenomenon, when several signals simultaneously transmitted from one and the same source arrive at the destination at different times.

    • Bus skew is such a program, when several instructions simultaneously transmitted from one and the same ALU arrive at the destination at the same moment.

    • Bus skew is such a protocol, when several pictures simultaneously transmitted from one and the same Video Buffer arrive at the destination at the same moment.

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