- •Features
- •Pin Configurations
- •Overview
- •Block Diagram
- •Disclaimer
- •Pin Descriptions
- •Port A (PA7..PA0)
- •Port B (PB7..PB0)
- •Port C (PC7..PC0)
- •Port D (PD7..PD0)
- •Port E(PE2..PE0)
- •RESET
- •XTAL1
- •XTAL2
- •AVR CPU Core
- •Introduction
- •Architectural Overview
- •Status Register
- •Stack Pointer
- •Interrupt Response Time
- •In-System Reprogrammable Flash Program memory
- •SRAM Data Memory
- •Data Memory Access Times
- •EEPROM Data Memory
- •EEPROM Read/Write Access
- •I/O Memory
- •Overview
- •Address Latch Requirements
- •Pull-up and Bus Keeper
- •Timing
- •Using all Locations of External Memory Smaller than 64 KB
- •Using all 64KB Locations of External Memory
- •Clock Systems and their Distribution
- •Clock Sources
- •Default Clock Source
- •Crystal Oscillator
- •External RC Oscillator
- •External Clock
- •Idle Mode
- •Power-down Mode
- •Standby Mode
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •Resetting the AVR
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Watchdog Timer
- •Timed Sequences for Changing the Configuration of the Watchdog Timer
- •Safety Level 0
- •Safety Level 1
- •Safety Level 2
- •Interrupts
- •Moving Interrupts between Application and Boot Space
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Unconnected pins
- •Alternate Port Functions
- •Alternate Functions of Port A
- •Alternate Functions Of Port B
- •Alternate Functions of Port C
- •Alternate Functions of Port D
- •Alternate Functions of Port E
- •Register Description for I/O Ports
- •External Interrupts
- •8-bit Timer/Counter0 with PWM
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Output Compare Unit
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •Internal Clock Source
- •Prescaler Reset
- •External Clock Source
- •16-bit Timer/Counter1
- •Overview
- •Registers
- •Definitions
- •Compatibility
- •Counter Unit
- •Input Capture Unit
- •Input Capture Trigger Source
- •Noise Canceler
- •Using the Input Capture Unit
- •Output Compare Units
- •Force Output Compare
- •Modes of Operation
- •Normal Mode
- •Fast PWM Mode
- •Phase Correct PWM Mode
- •Slave Mode
- •Master Mode
- •Data Modes
- •USART
- •Single USART
- •Clock Generation
- •External Clock
- •Synchronous Clock Operation
- •Frame Formats
- •Parity Bit Calculation
- •USART Initialization
- •Sending Frames with 5 to 8 Data Bits
- •Sending Frames with 9 Data Bits
- •Parity Generator
- •Disabling the Transmitter
- •Receiving Frames with 5 to 8 Data Bits
- •Receiving Frames with 9 Data Bits
- •Receiver Error Flags
- •Parity Checker
- •Disabling the Receiver
- •Flushing the Receive Buffer
- •Asynchronous Data Recovery
- •Using MPCM
- •Write Access
- •Read Access
- •Analog Comparator
- •Features
- •Application Section
- •Boot Loader Lock bits
- •Performing a Page Write
- •Using the SPM Interrupt
- •Setting the Boot Loader Lock bits by SPM
- •Reading the Fuse and Lock bits from Software
- •Preventing Flash Corruption
- •Simple Assembly Code Example for a Boot Loader
- •Program and Data Memory Lock bits
- •Fuse bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Calibration Byte
- •Signal Names
- •Parallel Programming
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Programming the Lock bits
- •Reading the Signature Bytes
- •Reading the Calibration Byte
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •External Clock Drive Waveforms
- •External Clock Drive
- •External Data Memory Timing
- •Active Supply Current
- •Idle Supply Current
- •Standby Supply Current
- •Pin Pull-up
- •Pin Driver Strength
- •Internal Oscillator Speed
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Errata
- •ATmega8515(L) Rev. B
- •Changes from Rev. 2512F-12/03 to Rev. 2512G-03/05
- •Changes from Rev. 2512F-12/03 to Rev. 2512E-09/03
- •Changes from Rev. 2512D-02/03 to Rev. 2512E-09/03
- •Changes from Rev. 2512C-10/02 to Rev. 2512D-02/03
- •Changes from Rev. 2512B-09/02 to Rev. 2512C-10/02
- •Changes from Rev. 2512A-04/02 to Rev. 2512B-09/02
- •Table of Contents
|
ATmega8515(L) |
|
Table of Contents |
Features................................................................................................ |
1 |
|
Pin Configurations............................................................................... |
2 |
|
Overview............................................................................................... |
3 |
|
Block Diagram ...................................................................................................... |
3 |
|
Disclaimer ............................................................................................................. |
4 |
|
AT90S4414/8515 and ATmega8515 Compatibility............................................... |
4 |
|
Pin Descriptions.................................................................................................... |
5 |
|
About Code Examples......................................................................... |
6 |
|
AVR CPU Core ..................................................................................... |
7 |
|
Introduction ........................................................................................................... |
7 |
|
Architectural Overview.......................................................................................... |
7 |
|
ALU – Arithmetic Logic Unit.................................................................................. |
8 |
|
Status Register ..................................................................................................... |
9 |
|
General Purpose Register File ........................................................................... |
10 |
|
Stack Pointer ...................................................................................................... |
11 |
|
Instruction Execution Timing............................................................................... |
12 |
|
Reset and Interrupt Handling.............................................................................. |
12 |
|
AVR ATmega8515 Memories ............................................................ |
15 |
|
In-System Reprogrammable Flash Program memory ........................................ |
15 |
|
SRAM Data Memory........................................................................................... |
16 |
|
EEPROM Data Memory...................................................................................... |
18 |
|
I/O Memory ......................................................................................................... |
23 |
|
External Memory Interface.................................................................................. |
24 |
|
XMEM Register Description................................................................................ |
28 |
|
System Clock and Clock Options .................................................... |
33 |
|
Clock Systems and their Distribution .................................................................. |
33 |
|
Clock Sources..................................................................................................... |
34 |
|
Default Clock Source .......................................................................................... |
34 |
|
Crystal Oscillator................................................................................................. |
34 |
|
Low-frequency Crystal Oscillator ........................................................................ |
36 |
|
External RC Oscillator ........................................................................................ |
37 |
|
Calibrated Internal RC Oscillator ........................................................................ |
38 |
|
External Clock..................................................................................................... |
39 |
|
Power Management and Sleep Modes............................................. |
40 |
|
Idle Mode ............................................................................................................ |
41 |
|
Power-down Mode.............................................................................................. |
41 |
|
Standby Mode..................................................................................................... |
42 |
|
Minimizing Power Consumption ......................................................................... |
42 |
|
|
i |
2512G–AVR–03/05 |
|
|
System Control and Reset ................................................................ |
44 |
Internal Voltage Reference ................................................................................. |
49 |
Watchdog Timer ................................................................................................. |
49 |
Timed Sequences for Changing the Configuration of the Watchdog Timer ....... |
52 |
Interrupts ............................................................................................ |
53 |
Interrupt Vectors in ATmega8515....................................................................... |
53 |
I/O Ports.............................................................................................. |
58 |
Introduction ......................................................................................................... |
58 |
Ports as General Digital I/O ................................................................................ |
59 |
Alternate Port Functions ..................................................................................... |
63 |
Register Description for I/O Ports ....................................................................... |
74 |
External Interrupts............................................................................. |
76 |
8-bit Timer/Counter0 with PWM........................................................ |
79 |
Overview............................................................................................................. |
79 |
Timer/Counter Clock Sources............................................................................. |
80 |
Counter Unit........................................................................................................ |
80 |
Output Compare Unit.......................................................................................... |
81 |
Compare Match Output Unit ............................................................................... |
83 |
Modes of Operation ............................................................................................ |
84 |
Timer/Counter Timing Diagrams......................................................................... |
88 |
8-bit Timer/Counter Register Description ........................................................... |
90 |
Timer/Counter0 and Timer/Counter1 Prescalers ............................ |
94 |
16-bit Timer/Counter1........................................................................ |
96 |
Overview............................................................................................................. |
96 |
Accessing 16-bit Registers ................................................................................. |
99 |
Timer/Counter Clock Sources........................................................................... |
102 |
Counter Unit...................................................................................................... |
102 |
Input Capture Unit............................................................................................. |
103 |
Output Compare Units ...................................................................................... |
105 |
Compare Match Output Unit ............................................................................. |
107 |
Modes of Operation .......................................................................................... |
108 |
Timer/Counter Timing Diagrams....................................................................... |
116 |
16-bit Timer/Counter Register Description ....................................................... |
118 |
Serial Peripheral Interface – SPI..................................................... |
125 |
SS Pin Functionality.......................................................................................... |
129 |
Data Modes ...................................................................................................... |
132 |
ii ATmega8515(L)
2512G–AVR–03/05
ATmega8515(L)
USART .............................................................................................. |
133 |
Single USART................................................................................................... |
133 |
Clock Generation .............................................................................................. |
135 |
Frame Formats ................................................................................................. |
138 |
USART Initialization.......................................................................................... |
139 |
Data Transmission – The USART Transmitter ................................................. |
140 |
Data Reception – The USART Receiver .......................................................... |
143 |
Asynchronous Data Reception ......................................................................... |
146 |
Multi-processor Communication Mode ............................................................. |
149 |
Accessing UBRRH/UCSRC Registers.............................................................. |
151 |
USART Register Description ............................................................................ |
153 |
Examples of Baud Rate Setting........................................................................ |
157 |
Analog Comparator ......................................................................... |
162 |
Boot Loader Support – Read-While-Write Self-Programming..... |
164 |
Features............................................................................................................ |
164 |
Application and Boot Loader Flash Sections .................................................... |
164 |
Read-While-Write and No Read-While-Write Flash Sections........................... |
164 |
Boot Loader Lock bits ....................................................................................... |
166 |
Entering the Boot Loader Program ................................................................... |
167 |
Addressing the Flash During Self-Programming .............................................. |
169 |
Self-Programming the Flash ............................................................................. |
170 |
Memory Programming..................................................................... |
177 |
Program and Data Memory Lock bits ............................................................... |
177 |
Fuse bits ........................................................................................................... |
178 |
Signature Bytes ................................................................................................ |
179 |
Calibration Byte ................................................................................................ |
179 |
Calibration Byte ................................................................................................ |
179 |
Parallel Programming Parameters, Pin Mapping, and Commands .................. |
180 |
Parallel Programming ....................................................................................... |
182 |
Serial Downloading........................................................................................... |
191 |
Serial Programming Pin Mapping ..................................................................... |
191 |
Electrical Characteristics................................................................ |
195 |
External Clock Drive Waveforms ...................................................................... |
197 |
External Clock Drive ......................................................................................... |
197 |
SPI Timing Characteristics ............................................................................... |
198 |
External Data Memory Timing .......................................................................... |
200 |
ATmega8515 Typical Characteristics ............................................ |
205 |
Register Summary ........................................................................... |
237 |
Instruction Set Summary ................................................................ |
239 |
|
iii |
2512G–AVR–03/05
Ordering Information....................................................................... |
242 |
Packaging Information .................................................................... |
244 |
44A ................................................................................................................... |
244 |
40P6 ................................................................................................................. |
245 |
44J .................................................................................................................... |
246 |
44M1................................................................................................................. |
247 |
Errata ................................................................................................ |
248 |
ATmega8515(L) Rev. B .................................................................................... |
248 |
Datasheet Revision History ............................................................ |
249 |
Changes from Rev. 2512F-12/03 to Rev. 2512G-03/05 ................................... |
249 |
Changes from Rev. 2512F-12/03 to Rev. 2512E-09/03 ................................... |
249 |
Changes from Rev. 2512D-02/03 to Rev. 2512E-09/03 ................................... |
249 |
Changes from Rev. 2512C-10/02 to Rev. 2512D-02/03................................... |
249 |
Changes from Rev. 2512B-09/02 to Rev. 2512C-10/02 ................................... |
249 |
Changes from Rev. 2512A-04/02 to Rev. 2512B-09/02 ................................... |
250 |
Table of Contents ................................................................................. |
i |
iv ATmega8515(L)
2512G–AVR–03/05
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