Electrical Characteristics

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					ATmega8515(L)

Electrical Characteristics


Absolute Maximum Ratings*
				*NOTICE: Stresses beyond those listed under “Absolute
Operating Temperature.................................. -55°C to +125°C				*NOTICE: Stresses beyond those listed under “Absolute
				Maximum Ratings” may cause permanent dam-
Storage Temperature ..................................... -65°C to +150°C				age to the device. This is a stress rating only and
				functional operation of the device at these or
Voltage on any Pin except			RESET	other conditions beyond those indicated in the
with respect to Ground ................................-0.5V to VCC+0.5V				operational sections of this specification is not
Voltage on		with respect to Ground......-0.5V to +13.0V		implied. Exposure to absolute maximum rating
Voltage on	RESET	with respect to Ground......-0.5V to +13.0V		conditions for extended periods may affect
Maximum Operating Voltage ............................................ 6.0V				device reliability.

DC Current per I/O Pin ............................................... 40.0 mA
DC Current VCC and GND Pins................................ 200.0 mA

DC Characteristics

TA = -40°C to 85°C, VCC = 2.7V to 5.5V (Unless Otherwise Noted)

Symbol

Parameter

Condition

Min

Typ

Max

Units

Input Low Voltage except

(1)

VIL

XTAL1 and

pins

VCC=2.7V - 5.5V

-0.5

0.2 VCC

RESET

VIH

Input High Voltage except

VCC=2.7V - 5.5V

0.6 VCC

(2)

VCC + 0.5

XTAL1 and

RESET

pins

VIL1

Input Low Voltage

VCC=2.7V - 5.5V

-0.5

(1)

XTAL1 pin

0.1 VCC

VIH1

Input High Voltage

VCC=2.7V - 5.5V

0.8 VCC

(2)

VCC + 0.5

XTAL1 pin

VIL2

Input Low Voltage

VCC=2.7V - 5.5V

-0.5

0.2 VCC

RESET pin

VIH2

Input High Voltage

VCC=2.7V - 5.5V

0.9 VCC

(2)

VCC + 0.5

RESET pin

Output Low Voltage(3)

= 20 mA, V

= 5V

0.7

VOL

(Ports A,B,C,D,E)

IOL = 10 mA, VCC = 3V

0.5

VOH

Output High Voltage(4)

IOH = -20 mA, VCC = 5V

4.2

(Ports A,B,C,D,E)

IOH = -10 mA, VCC = 3V

2.2

IIL

Input Leakage

VCC = 5.5V, pin low

µA

Current I/O Pin

(absolute value)

IIH

Input Leakage

VCC = 5.5V, pin high

µA

Current I/O Pin

(absolute value)

RRST

Reset Pull-up Resistor

kΩ

Rpu

I/O Pin Pull-up Resistor

kΩ

195

2512G–AVR–03/05

DC Characteristics (Continued)

TA = -40°C to 85°C, VCC = 2.7V to 5.5V (Unless Otherwise Noted)

Symbol	Parameter	Condition	Min	Typ	Max	Units

		Active 4 MHz, VCC = 3V			4	mA
		(ATmega8515L)			4	mA
		(ATmega8515L)

		Active 8 MHz, VCC = 5V			12	mA
		(ATmega8515)			12	mA
	Power Supply Current	(ATmega8515)

ICC		Idle 4 MHz, VCC = 3V			1.5	mA
		Idle 4 MHz, VCC = 3V
		(ATmega8515L)
		(ATmega8515L)
		Idle 8 MHz, VCC = 5V			5.5	mA
		(ATmega8515)			5.5	mA
		(ATmega8515)

	Power-down mode(5)	WDT enabled, VCC = 3V			< 13	µA
	Power-down mode(5)	WDT disabled, VCC = 3V			< 2	µA
		WDT disabled, VCC = 3V			< 2	µA
VACIO	Analog Comparator	VCC = 5V			40	mV
VACIO	Input Offset Voltage	Vin = VCC/2			40	mV
	Input Offset Voltage	Vin = VCC/2
IACLK	Analog Comparator	VCC = 5V	-50		50	nA
IACLK	Input Leakage Current	Vin = VCC/2	-50		50	nA
	Input Leakage Current	Vin = VCC/2
tACPD	Analog Comparator	VCC = 2.7V		750		ns
tACPD	Propagation Delay	VCC = 4.0V		500		ns
	Propagation Delay	VCC = 4.0V		500

Notes: 1. “Max” means the highest value where the pin is guaranteed to be read as low.

2.“Min” means the lowest value where the pin is guaranteed to be read as high.

3.Although each I/O port can sink more than the test conditions (20 mA at VCC = 5V, 10 mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed:

1] The sum of all IOL, for all ports, should not exceed 200 mA.

2] The sum of all IOL, for ports B0 - B7, D0 - D7, and XTAL2, should not exceed 100 mA. 3] The sum of all IOL, for ports A0 - A7, E0 - E2, and C0 - C7 should not exceed 100 mA.

4.Although each I/O port can source more than the test conditions (20 mA at VCC = 5V, 10 mA at VCC = 3V) under steady state conditions (non-transient),the following must be observed:

1] The sum of all IOH,for all ports, should not exceed 200 mA.

2] The sum of all IOH,for ports B0 - B7, D0 - D7, and XTAL2,should not exceed 100 mA. 3] The sum of all IOH,for ports A0 - A7, E0 - E2, and C0 - C7 should not exceed 100 mA.

5.Minimum VCC for Power-down is 2.5V.

196 ATmega8515(L)

2512G–AVR–03/05

ATmega8515(L)

External Clock Drive

Waveforms

External Clock Drive

Figure 86. External Clock Drive Waveforms

VIH1

VIL1

Table 95. External Clock Drive

		VCC = 2.7 - 5.5V			VCC = 4.5 - 5.5V
Symbol	Parameter	Min		Max	Min	Max	Units

1/tCLCL	Oscillator Frequency	0		8	0	16	MHz
tCLCL	Clock Period	125			62.5		ns
tCHCX	High Time	50			25		ns
tCLCX	Low Time	50			25		ns
tCLCH	Rise Time			1.6		0.5	µs
tCHCL	Fall Time			1.6		0.5	µs
∆tCLCL	Change in period from
∆tCLCL	one clock cycle to the			2		2	%
	next(1)
Note: 1.	Refer to “External Clock” on page 39 for details.
Table 96. External RC Oscillator, Typical Frequencies (VCC = 5V)
	R [kΩ](1)		C [pF]			f(2)
	100		47			87 kHz

	33		22			650 kHz

	10		22			2.0 MHz

Notes: 1. R should be in the range 3 kΩ - 100 kΩ, and C should be at least 20 pF. The C values given in the table includes pin capacitance. This will vary with package type.

2. The frequency will vary with package type and board layout.

197

2512G–AVR–03/05

SPI Timing

Characteristics

See Figure 87 and Figure 88 for details.

Table 97. SPI Timing Parameters

Description

Mode

Min

Typ

Max

SCK period

Master

See Table 58

SCK high/low

Master

50% duty cycle

Rise/Fall time

Master

3.6

Setup

Master

Hold

Master

Out to SCK

Master

0.5 • tSCK

SCK to out

Master

SCK to out high

Master

SS low to out

Slave

SCK period

Slave

4 • tck

SCK high/low(1)

Slave

2 • t

Rise/Fall time

Slave

1.6

µs

Setup

Slave

Hold

Slave

tck

SCK to out

Slave

SCK to

high

Slave

high to tri-state

Slave

low to SCK

Salve

2 • tck

Note:

1. In SPI Programming mode the minimum SCK high/low period is:

-2 tCLCL for fCK < 12 MHz

-3 tCLCL for fCK >12 MHz

Figure 87. SPI Interface Timing Requirements (Master Mode)

SCK
(CPOL = 0)
		2	2
SCK
(CPOL = 1)
4	5		3
MISO	MSB	...	LSB
(Data Input)	MSB	...	LSB
(Data Input)
		7	8
MOSI	MSB	...	LSB
(Data Output)	MSB	...	LSB
(Data Output)

198 ATmega8515(L)

2512G–AVR–03/05

ATmega8515(L)

Figure 88. SPI Interface Timing Requirements (Slave Mode)

18
SS
9			10	16
9
SCK
(CPOL = 0)
		11	11
SCK
(CPOL = 1)
13	14			12
MOSI	MSB	...	LSB
(Data Input)	MSB	...	LSB
(Data Input)
		15		17
MISO	MSB	...	LSB	X
(Data Output)	MSB	...	LSB	X
(Data Output)

199

2512G–AVR–03/05

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Electrical Characteristics

Absolute Maximum Ratings*

External Clock Drive

Figure 86. External Clock Drive Waveforms