- •FEATURES
- •APPLICATIONS
- •DESCRIPTION
- •ABSOLUTE MAXIMUM RATINGS
- •RECOMMENDED OPERATING CONDITIONS
- •ELECTRICAL CHARACTERISTICS
- •ELECTRICAL CHARACTERISTICS
- •DIGITAL CHARACTERISTICS
- •TIMING CHARACTERISTICS – LVDS AND CMOS MODES
- •DEVICE PROGRAMMING MODES
- •USING SERIAL INTERFACE PROGRAMMING ONLY
- •USING PARALLEL INTERFACE CONTROL ONLY
- •SERIAL INTERFACE
- •REGISTER INITIALIZATION
- •SERIAL INTERFACE TIMING
- •RESET TIMING
- •SERIAL REGISTER MAP
- •DESCRIPTION OF SERIAL REGISTERS
- •TYPICAL CHARACTERISTICS - ADS6125 (FS= 125 MSPS)
- •TYPICAL CHARACTERISTICS - ADS6124 (FS= 105 MSPS)
- •TYPICAL CHARACTERISTICS - ADS6123 (FS= 80 MSPS)
- •TYPICAL CHARACTERISTICS - ADS6122 (FS= 65 MSPS)
- •TYPICAL CHARACTERISTICS - LOW SAMPLING FREQUENCIES
- •FS = 40 MSPS
- •FS = 25 MSPS
- •COMMON PLOTS
- •Contour Plots Across Input and Sampling Frequencies
- •APPLICATION INFORMATION
- •THEORY OF OPERATION
- •ANALOG INPUT
- •Drive Circuit Requirements
- •Using RF-Transformer Based Drive Circuits
- •Using Differential Amplifier Drive Circuits
- •Input Common-Mode
- •REFERENCE
- •Internal Reference
- •External Reference
- •COARSE GAIN and PROGRAMMABLE FINE GAIN
- •CLOCK INPUT
- •POWER DOWN MODES
- •Global Powerdown
- •Standby
- •Output Buffer Disable
- •Input Clock Stop
- •Power Supply Sequence
- •DIGITAL OUTPUT INTERFACE
- •Parallel CMOS Interface
- •DDR LVDS Interface
- •Output Data Format
- •Output Timings
- •BOARD DESIGN CONSIDERATIONS
- •Grounding
- •Supply Decoupling
- •Exposed Thermal Pad
- •DEFINITION OF SPECIFICATIONS
- •Analog Bandwidth
- •Aperture Delay
- •Aperture Uncertainty (Jitter)
- •Clock Pulse Width/Duty Cycle
- •Maximum Conversion Rate
- •Minimum Conversion Rate
- •Differential Nonlinearity (DNL)
- •Integral Nonlinearity (INL)
- •Gain Error
- •Offset Error
- •Temperature Drift
- •Signal-to-Noise Ratio
- •Signal-to-Noise and Distortion (SINAD)
- •Effective Number of Bits (ENOB)
- •Total Harmonic Distortion (THD)
- •Spurious-Free Dynamic Range (SFDR)
- •Two-Tone Intermodulation Distortion
- •DC Power Supply Rejection Ratio (DC PSRR)
- •AC Power Supply Rejection Ratio (AC PSRR)
- •Common Mode Rejection Ratio (CMRR)
- •Voltage Overload Recovery
ADS6125, ADS6124
ADS6123, ADS6122
www.ti.com
SLAS560A–OCTOBER 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6123 (FS= 80 MSPS)
All plots are at 25°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output interface (unless otherwise noted)
Amplitude − dB
0
−20
−40
−60
−80
−100
−120
−140
−160
FFT for 20 MHz INPUT SIGNAL
SFDR = 89.34 dBc
SINAD = 71.57 dBFS
SNR = 71.74 dBFS
THD = 86.63 dBc
0 |
10 |
20 |
30 |
40 |
f − Frequency − MHz
G037
Figure 44.
Amplitude − dB
0
−20
−40
−60
−80
−100
−120
−140
−160
0
FFT for 70 MHz INPUT SIGNAL
SFDR = 83.43 dBc
SINAD = 71.03 dBFS
SNR = 71.49 dBFS
THD = 82.65 dBc
10 |
20 |
30 |
40 |
f − Frequency − MHz
G038
Figure 45.
Amplitude − dB
0
−20
−40
−60
−80
−100
−120
−140
−160
FFT for 230 MHz INPUT SIGNAL |
INTERMODULATION DISTORTION (IMD) vs FREQUENCY |
|
|
|
SFDR = 81.4 dBc |
|
0 |
fIN1 = 190.1 MHz, ±7 dBFS |
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
SINAD = 69 dBFS |
|
−20 |
fIN2 = 185.3 MHz, ±7 dBFS |
|
|
|
|
|
|
SNR = 69.7 dBFS |
|
|
2-Tone IMD = ±84.1 dBFS |
|
|
|
|
|
|
THD = 78 dBc |
|
−40 |
SFDR = ±89.5 dBFS |
|
|
|
|
|
|
|
− dB |
−60 |
|
|
|
|
|
|
|
|
Amplitude |
−80 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
−100 |
|
|
|
|
|
|
|
|
|
−120 |
|
|
|
|
|
|
|
|
|
−140 |
|
|
|
|
|
|
|
|
|
−160 |
|
|
|
|
0 |
10 |
20 |
30 |
40 |
0 |
10 |
20 |
30 |
40 |
|
|
f − Frequency − MHz |
|
G039 |
|
f − Frequency − MHz |
|
G040 |
|
|
|
|
|
|
|
|
|
||
Figure 46. |
Figure 47. |
SFDR vs INPUT FREQUENCY |
SNR vs INPUT FREQUENCY |
|
100 |
|
|
|
|
|
|
|
|
|
|
76 |
|
96 |
|
|
|
|
|
|
|
|
|
|
74 |
|
92 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
88 |
|
|
|
Gain = 3.5 dB |
|
|
|
dBFS |
72 |
||
− dBc |
84 |
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
70 |
|||
|
|
|
|
|
|
|
|
|
|
|||
80 |
|
|
|
|
|
|
|
|
|
|
||
SFDR |
|
|
|
|
|
|
|
|
|
SNR − |
|
|
76 |
|
Gain = 0 dB |
|
|
|
|
|
68 |
||||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
||
|
72 |
|
|
|
|
|
|
|
|
|
|
66 |
|
68 |
|
|
|
|
|
|
|
|
|
|
64 |
|
64 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
60 |
|
|
|
|
|
|
|
|
|
|
62 |
|
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
|
|
fIN − Input Frequency − MHz |
|
|
G041 |
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Gain = 0 dB |
|
|
|
|
|
|
|
Gain = 3.5 dB |
|
|
|
|
|
|
||
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
fIN − Input Frequency − MHz |
|
|
G042 |
||||
|
|
|
|
|
|
|
|
|
|
|
Figure 48. |
Figure 49. |
Copyright © 2007–2008, Texas Instruments Incorporated |
Submit Documentation Feedback |
31 |
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122
ADS6125, ADS6124
ADS6123, ADS6122
www.ti.com
SLAS560A–OCTOBER 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6123 (FS= 80 MSPS) (continued)
All plots are at 25°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output interface (unless otherwise noted)
SFDR vs INPUT FREQUENCY (LVDS interface) |
SNR vs INPUT FREQUENCY (LVDS interface) |
|
100 |
|
|
|
|
|
|
|
|
|
|
76 |
|
96 |
|
|
|
|
|
|
|
|
|
|
74 |
|
92 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
88 |
|
|
|
|
Gain = 3.5 dB |
|
|
dBFS |
72 |
||
− dBc |
|
|
|
|
|
|
|
|
||||
84 |
|
|
|
|
|
|
|
|
|
70 |
||
|
|
|
|
|
|
|
|
|
|
|||
80 |
|
|
|
|
|
|
|
|
|
|
||
SFDR |
|
|
|
|
|
|
|
|
|
SNR − |
|
|
76 |
|
|
Gain = 0 dB |
|
|
|
|
68 |
||||
|
|
|
|
|
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|||
|
72 |
|
|
|
|
|
|
|
|
|
|
66 |
|
68 |
|
|
|
|
|
|
|
|
|
|
64 |
|
64 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
60 |
|
|
|
|
|
|
|
|
|
|
62 |
|
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
|
|
fIN − Input Frequency − MHz |
|
|
G043 |
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Gain = 0 dB |
|
|
|
|
|
|
|
Gain = 3.5 dB |
|
|
|
|
|
|
||
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
fIN − Input Frequency − MHz |
|
|
G044 |
||||
|
|
|
|
|
|
|
|
|
|
|
Figure 50. |
Figure 51. |
SFDR vs INPUT FREQUENCY ACROSS GAINS |
SINAD vs INPUT FREQUENCY ACROSS GAINS |
|
95 |
|
|
|
|
|
74 |
|
|
|
Input adjusted to get −1dBFS input |
|
72 |
||
|
90 |
|
|
|
|
|
|
|
|
|
3 dB |
|
|
|
|
|
|
|
|
|
|
70 |
|
|
85 |
|
|
2 dB |
6 dB |
|
|
|
|
|
dBFS |
|
|||
dBc |
|
|
|
68 |
|||
80 |
|
|
|
|
|||
|
|
|
|
|
|||
− |
|
|
|
|
5 dB |
− |
66 |
SFDR |
|
0 dB |
|
|
SINAD |
||
75 |
1 dB |
|
4 dB |
||||
|
|
|
|||||
|
|
|
64 |
||||
|
|
|
|
|
|||
|
|
|
|
|
|
||
|
70 |
|
|
|
|
|
62 |
|
|
|
|
|
|
|
|
|
65 |
|
|
|
|
|
60 |
|
|
|
|
|
|
|
|
|
60 |
|
|
|
|
|
58 |
|
0 |
100 |
200 |
300 |
400 |
500 |
|
|
|
|
fIN − Input Frequency − MHz |
|
G045 |
|
|
|
|
|
|
|
|
|
|
|
|
0 dB |
Input adjusted to get −1dBFS input |
|
||
|
|
|
|
|
|
|
|
|
|
1 dB |
|
|
|
|
|
|
|
2 dB |
|
|
|
|
|
|
3 dB |
|
|
|
4 dB |
5 dB |
|
6 dB |
|
|
0 |
100 |
|
200 |
300 |
400 |
500 |
|
|
fIN − Input Frequency − MHz |
|
G046 |
||
|
|
|
|
|
|
|
Figure 52. |
Figure 53. |
SFDR − dBc
PERFORMANCE vs AVDD |
PERFORMANCE vs DRVDD |
88 |
|
|
|
|
|
78 |
|
|
102 |
|
|
|
|
|
|
|
|
|
74 |
|
86 |
fIN = 70.1 MHz |
|
|
|
|
77 |
|
|
100 |
|
fIN = 10.1 MHz |
|
|
|
|
|
|
73 |
|
|
DRVDD = 3.3 V |
|
|
SFDR |
|
|
|
|
AVDD = 3.3 V |
|
|
SNR |
|
|
|
|
|||||
84 |
|
|
|
|
|
76 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
98 |
|
|
|
|
|
|
|
|
|
72 |
|
||
|
|
|
|
|
|
|
dBFS |
dBc− |
|
|
|
|
|
|
|
|
|
dBFS |
||
82 |
|
|
|
|
|
75 |
96 |
|
|
|
|
|
|
|
|
|
71 |
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
80 |
|
|
|
|
|
74 |
SNR− |
SFDR |
94 |
|
|
|
SFDR |
|
|
|
|
70 |
SNR− |
|
78 |
|
|
|
|
|
73 |
|
|
|
|
|
|
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
76 |
|
|
SNR |
|
|
72 |
|
|
92 |
|
|
|
|
|
|
|
|
|
69 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
74 |
|
|
|
|
|
71 |
|
|
90 |
|
|
|
|
|
|
|
|
|
68 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
72 |
|
|
|
|
|
70 |
|
|
88 |
|
|
|
|
|
|
|
|
|
67 |
|
3.0 |
3.1 |
3.2 |
3.3 |
3.4 |
3.5 |
3.6 |
|
|
|
1.8 |
2.0 |
2.2 |
2.4 |
2.6 |
2.8 |
3.0 |
3.2 |
3.4 |
3.6 |
|
|
AV |
− Supply V oltage − V |
|
|
|
|
|
|
|
DRVDD − Supply V oltage − V |
|
|
|
G048 |
||||||
|
|
DD |
|
|
|
|
G047 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Figure 54. |
Figure 55. |
32 |
Submit Documentation Feedback |
Copyright © 2007–2008, Texas Instruments Incorporated |
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122
ADS6125, ADS6124
ADS6123, ADS6122
www.ti.com
SLAS560A–OCTOBER 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6123 (FS= 80 MSPS) (continued)
All plots are at 25°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output interface (unless otherwise noted)
PERFORMANCE vs TEMPERATURE |
PERFORMANCE vs INPUT AMPLITUDE |
|
99 |
|
|
|
|
|
74 |
|
|
110 |
|
|
|
|
|
90 |
|
|
|
|
|
|
|
|
|
|
|
100 |
|
|
|
|
|
85 |
|
|
97 |
|
|
SFDR |
|
|
73 |
|
|
90 |
|
SFDR (dBFS) |
|
|
80 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||
dBc−SFDR |
|
|
|
|
|
|
|
dBFS−SNR |
dBFSdBc,−SFDR |
|
|
|
|
|
dBFS−SNR |
||
95 |
|
|
|
|
|
72 |
80 |
|
|
|
|
|
75 |
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
SNR |
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
70 |
|
|
|
|
|
70 |
|
|
|
|
|
|
|
|
|
|
|
|
|
SNR (dBFS) |
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
93 |
|
|
|
|
|
71 |
|
|
60 |
|
|
|
|
|
65 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
91 |
|
|
|
|
|
70 |
|
|
50 |
SFDR (dBc) |
|
|
|
60 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
fIN = 10.1 MHz |
|
|
|
|
|
|
40 |
|
|
|
|
|
55 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
fIN = 20 MHz |
|
|||
|
89 |
|
|
|
|
|
69 |
|
|
30 |
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
50 |
|
|||
|
−40 |
−20 |
0 |
20 |
40 |
60 |
80 |
|
|
−60 |
−50 |
−40 |
−30 |
−20 |
−10 |
0 |
|
|
|
|
|
T − T emperature − °C |
|
|
G049 |
|
|
|
Input Amplitude − dBFS |
|
|
G050 |
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
Figure 56. |
Figure 57. |
SFDR − dBc
PERFORMANCE vs CLOCK AMPLITUDE |
PERFORMANCE vs INPUT CLOCK DUTY CYCLE |
94
92
SNR
90
88 |
SFDR |
|
86
84
82
80
fIN = 20.1 MHz
78
0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
|
|
Input Clock Amplitude − V PP |
|
|
Figure 58.
72.0 |
|
|
98 |
|
fIN = 10.1 MHz |
|
|
|
|
72.0 |
|
||
71.5 |
|
|
96 |
|
SFDR |
|
|
|
71.5 |
|
|||
|
|
|
|
|
|
|
|
|
|
||||
71.0 |
|
|
94 |
|
|
|
|
|
|
|
|
71.0 |
|
70.5 |
dBFS |
− dBc |
92 |
|
|
|
|
SNR |
|
|
|
70.5 |
dBFS |
70.0 |
90 |
|
|
|
|
|
|
|
|
70.0 |
|||
SNR − |
SFDR |
|
|
|
|
|
|
|
|
SNR − |
|||
69.5 |
88 |
|
|
|
|
|
|
|
|
69.5 |
|||
69.0 |
|
|
86 |
|
|
|
|
|
|
|
|
69.0 |
|
68.5 |
|
|
84 |
|
|
|
|
|
|
|
|
68.5 |
|
68.0 |
|
|
82 |
|
|
|
|
|
|
|
|
68.0 |
|
3.0 |
|
|
|
30 |
35 |
40 |
45 |
50 |
55 |
60 |
65 |
70 |
|
|
G051 |
|
|
|
|
|
Input Clock Duty Cycle − % |
|
|
|
G052 |
||
|
|
|
|
|
|
|
|
|
|
|
|
||
Figure 59.
PERFORMANCE IN EXTERNAL REFERENCE MODE
|
92 |
fIN = 20.1 MHz |
|
|
|
|
78 |
|
||
|
|
|
|
|
|
|
|
|||
|
|
External Reference Mode |
|
|
|
|
|
|||
|
90 |
|
|
|
|
SFDR |
|
|
76 |
|
|
|
|
|
|
|
|
|
|
|
|
− dBc |
88 |
|
|
|
|
|
|
|
74 |
dBFS |
|
|
|
|
|
|
|
|
|
||
SFDR |
86 |
|
|
SNR |
|
|
|
|
72 |
SNR − |
|
|
|
|
|
|
|
|
|
||
|
84 |
|
|
|
|
|
|
|
70 |
|
|
82 |
|
|
|
|
|
|
|
68 |
|
|
1.30 |
1.35 |
1.40 |
1.45 |
1.50 |
1.55 |
1.60 |
1.65 |
1.70 |
|
|
|
|
|
VVCM − VCM V oltage − V |
|
|
|
G054 |
||
|
|
|
|
|
|
|
|
|
|
|
Figure 60.
Copyright © 2007–2008, Texas Instruments Incorporated |
Submit Documentation Feedback |
33 |
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122
ADS6125, ADS6124
ADS6123, ADS6122
www.ti.com
SLAS560A–OCTOBER 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6122 (FS= 65 MSPS)
All plots are at 25°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output interface (unless otherwise noted)
Amplitude − dB
Amplitude − dB
0 |
FFT for 20 MHz INPUT SIGNAL |
|
|
0 |
FFT for 90 MHz INPUT SIGNAL |
|
||
SFDR = 91.8 dBc |
|
|
|
SFDR = 83 dBc |
|
|
||
|
|
|
|
|
|
|
||
−20 |
SINAD = 71.1 dBFS |
|
|
|
−20 |
SINAD = 71.1 dBFS |
|
|
|
SNR = 71.8 dBFS |
|
|
|
|
SNR = 71.6 dBFS |
|
|
−40 |
THD = 89.8 dBc |
|
|
|
−40 |
THD = 82.3 dBc |
|
|
−60 |
|
|
|
− dB |
−60 |
|
|
|
−80 |
|
|
|
Amplitude |
−80 |
|
|
|
|
|
|
|
|
|
|
||
−100 |
|
|
|
|
−100 |
|
|
|
−120 |
|
|
|
|
−120 |
|
|
|
−140 |
|
|
|
|
−140 |
|
|
|
−160 |
|
|
|
|
−160 |
|
|
|
0 |
10 |
20 |
30 |
|
0 |
10 |
20 |
30 |
|
f − Frequency − MHz |
G055 |
|
|
f − Frequency − MHz |
G056 |
||
|
|
|
|
|
|
|
||
|
|
Figure 61. |
|
|
|
|
Figure 62. |
|
|
FFT for 230 MHz INPUT SIGNAL |
|
|
INTERMODULATION DISTORTION (IMD) vs FREQUENCY |
||||
0 |
SFDR = 82.8 dBc |
|
|
|
0 |
|
fIN1 = 190.1 MHz, ±7 dBFS |
|
|
|
|
|
|
|
|||
−20 |
SINAD = 69.5 dBFS |
|
|
|
−20 |
|
fIN2 = 185.3 MHz, ±7 dBFS |
|
|
SNR = 70.1 dBFS |
|
|
|
|
|
2-Tone IMD = ±88.5 dBFS |
|
−40 |
THD = 79.6 dBc |
|
|
|
−40 |
|
SFDR = ±91.9 dBFS |
|
−60 |
|
|
|
− dB |
−60 |
|
|
|
−80 |
|
|
|
Amplitude |
−80 |
|
|
|
|
|
|
|
|
|
|
||
−100 |
|
|
|
|
−100 |
|
|
|
−120 |
|
|
|
|
−120 |
|
|
|
−140 |
|
|
|
|
−140 |
|
|
|
−160 |
|
|
|
|
−160 |
|
|
|
0 |
10 |
20 |
30 |
|
0 |
10 |
20 |
30 |
|
f − Frequency − MHz |
G057 |
|
|
f − Frequency − MHz |
G058 |
||
|
|
|
|
|
|
|
||
Figure 63. |
Figure 64. |
SFDR vs INPUT FREQUENCY |
SNR vs INPUT FREQUENCY |
|
100 |
|
|
|
|
|
|
|
|
|
|
76 |
|
96 |
|
|
|
|
|
|
|
|
|
|
74 |
|
92 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
88 |
|
|
|
|
Gain = 3.5 dB |
|
|
dBFS |
72 |
||
− dBc |
|
|
|
|
|
|
|
|
||||
84 |
|
|
|
|
|
|
|
|
|
70 |
||
|
|
|
|
|
|
|
|
|
|
|||
80 |
|
|
|
|
|
|
|
|
|
|
||
SFDR |
|
|
|
|
|
|
|
|
|
SNR − |
|
|
76 |
|
|
Gain = 0 dB |
|
|
|
|
|
68 |
|||
|
|
|
|
|
|
|
|
|||||
|
72 |
|
|
|
|
|
|
|
|
|
|
66 |
|
68 |
|
|
|
|
|
|
|
|
|
|
64 |
|
64 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
60 |
|
|
|
|
|
|
|
|
|
|
62 |
|
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
|
|
fIN − Input Frequency − MHz |
|
|
G059 |
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Gain = 0 dB |
|
|
|
||
|
|
|
Gain = 3.5 dB |
|
|
|
|
|
|
|
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
fIN − Input Frequency − MHz |
|
|
G060 |
||||
|
|
|
|
|
|
|
|
|
|
|
Figure 65. |
Figure 66. |
34 |
Submit Documentation Feedback |
Copyright © 2007–2008, Texas Instruments Incorporated |
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122
ADS6125, ADS6124
ADS6123, ADS6122
www.ti.com
SLAS560A–OCTOBER 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6122 (FS= 65 MSPS) (continued)
All plots are at 25°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output interface (unless otherwise noted)
SFDR vs INPUT FREQUENCY (LVDS interface) |
SNR vs INPUT FREQUENCY (LVDS interface) |
|
100 |
|
|
|
|
|
|
|
|
|
|
76 |
|
96 |
|
|
|
|
|
|
|
|
|
|
74 |
|
92 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
− dBc |
88 |
|
|
|
|
Gain = 3.5 dB |
|
|
dBFS |
72 |
||
84 |
|
|
|
|
|
|
|
|
|
70 |
||
|
|
|
|
|
|
|
|
|
|
|||
80 |
|
|
|
|
|
|
|
|
|
|
||
SFDR |
|
|
|
|
|
|
|
|
|
SNR − |
|
|
76 |
|
|
Gain = 0 dB |
|
|
|
|
68 |
||||
|
|
|
|
|
|
|
||||||
|
72 |
|
|
|
|
|
|
|
|
|
|
66 |
|
68 |
|
|
|
|
|
|
|
|
|
|
64 |
|
64 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
60 |
|
|
|
|
|
|
|
|
|
|
62 |
|
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
|
|
fIN − Input Frequency − MHz |
|
|
G061 |
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Gain = 0 dB |
|
|
|
|
|
|
|
Gain = 3.5 dB |
|
|
|
|
|
|
||
0 |
50 |
100 |
150 |
200 |
250 |
300 |
350 |
400 |
450 |
500 |
|
|
|
fIN − Input Frequency − MHz |
|
|
G062 |
||||
|
|
|
|
|
|
|
|
|
|
|
Figure 67. |
Figure 68. |
SFDR vs INPUT FREQUENCY ACROSS GAINS |
SINAD vs INPUT FREQUENCY ACROSS GAINS |
|
95 |
|
|
|
|
|
76 |
|
|
|
Input adjusted to get −1dBFS input |
|
74 |
||
|
90 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
85 |
|
|
3 dB |
|
|
72 |
|
|
|
|
|
− dBFS |
|
|
− dBc |
80 |
|
|
|
6 dB |
70 |
|
1 dB |
|
|
|||||
|
|
|
|||||
|
|
|
68 |
||||
SFDR |
|
0 dB |
|
|
5 dB |
SINAD |
|
75 |
|
|
|
||||
|
|
|
|
||||
|
2 dB |
|
|
66 |
|||
|
|
|
|
||||
|
|
|
|
|
|
||
|
70 |
|
|
|
|
|
64 |
|
|
|
|
|
|
|
|
|
65 |
|
|
|
4 dB |
|
62 |
|
|
|
|
|
|
|
|
|
60 |
|
|
|
|
|
60 |
|
0 |
100 |
200 |
300 |
400 |
500 |
|
|
|
|
fIN − Input Frequency − MHz |
G063 |
|
||
|
|
|
|
|
|
|
|
|
|
Input adjusted to get −1dBFS input |
|
||
|
|
0 dB |
2 dB |
|
|
|
|
|
1 dB |
|
|
|
3 dB |
|
|
|
|
|
4 dB |
5 dB |
6 dB |
|
|
0 |
100 |
200 |
300 |
400 |
500 |
|
fIN |
− Input Frequency − MHz |
|
G064 |
|
Figure 69. |
Figure 70. |
PERFORMANCE vs AVDD |
PERFORMANCE vs DRVDD |
|
96 |
|
|
|
|
|
77 |
|
|
106 |
|
|
|
|
|
|
|
|
|
75 |
|
|
94 |
fIN = 70.1 MHz |
|
|
|
|
76 |
|
|
104 |
|
fIN = 10.1 MHz |
|
|
|
|
|
|
74 |
|
|
|
DRVDD = 3.3 V |
|
|
|
|
|
|
|
AVDD = 3.3 V |
|
|
|
|
|
|
|
|||||
|
92 |
|
|
SFDR |
|
|
75 |
|
|
102 |
|
|
|
|
|
|
|
|
|
73 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
− dBc |
90 |
|
|
|
|
|
74 |
dBFS |
− dBc |
|
|
|
|
|
SNR |
|
|
|
|
|
dBFS |
|
|
|
|
|
100 |
|
|
|
|
|
|
|
|
|
72 |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||||
88 |
|
|
|
|
|
73 |
|
|
|
|
|
|
|
|
|
|
|
||||
SFDR |
|
|
|
|
|
SNR − |
SFDR |
|
|
|
|
|
|
|
|
|
|
|
SNR − |
||
86 |
|
|
SNR |
|
|
72 |
98 |
|
|
|
|
SFDR |
|
|
|
|
71 |
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||||||
|
84 |
|
|
|
|
|
71 |
|
|
96 |
|
|
|
|
|
|
|
|
|
70 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
82 |
|
|
|
|
|
70 |
|
|
94 |
|
|
|
|
|
|
|
|
|
69 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
80 |
|
|
|
|
|
69 |
|
|
92 |
|
|
|
|
|
|
|
|
|
68 |
|
|
3.0 |
3.1 |
3.2 |
3.3 |
3.4 |
3.5 |
3.6 |
|
|
|
1.8 |
2.0 |
2.2 |
2.4 |
2.6 |
2.8 |
3.0 |
3.2 |
3.4 |
3.6 |
|
|
|
AVDD − Supply V oltage − V |
|
|
G065 |
|
|
|
|
DRVDD − Supply V oltage − V |
|
|
|
G066 |
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
Figure 71. |
|
|
|
|
|
|
|
|
|
Figure 72. |
|
|
|
|
|||
Copyright © 2007–2008, Texas Instruments Incorporated |
Submit Documentation Feedback |
35 |
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122
ADS6125, ADS6124
ADS6123, ADS6122
www.ti.com
SLAS560A–OCTOBER 2007–REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6122 (FS= 65 MSPS) (continued)
All plots are at 25°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 VPP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output interface (unless otherwise noted)
PERFORMANCE vs TEMPERATURE |
PERFORMANCE vs INPUT AMPLITUDE |
|
98 |
|
|
|
|
|
|
|
|
fIN = 10.1 MHz |
|
|
|
|
|
|
96 |
|
|
|
|
|
|
|
94 |
|
|
SFDR |
|
|
|
− dBc |
|
|
|
|
|
|
|
92 |
|
|
|
|
|
|
|
SFDR |
|
|
|
|
|
|
|
90 |
|
SNR |
|
|
|
||
|
|
|
|
|
|||
|
88 |
|
|
|
|
|
|
|
86 |
|
|
|
|
|
|
|
−40 |
−20 |
0 |
20 |
40 |
60 |
80 |
|
|
|
|
T − T emperature − °C |
|
|
|
76 |
|
|
110 |
|
|
|
|
|
90 |
|
75 |
|
|
100 |
SFDR (dBFS) |
|
|
|
85 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
dBc, dBFS |
90 |
|
|
|
|
|
80 |
|
74 |
− dBFS |
80 |
|
SNR (dBFS) |
|
|
75 |
− dBFS |
||
|
|
|
|
|||||||
|
|
|
|
|
|
|||||
73 |
70 |
|
|
|
|
|
70 |
|||
|
|
|
|
|
|
|
|
|||
72 |
SNR |
SFDR − |
60 |
|
|
|
|
|
65 |
SNR |
|
SFDR (dBc) |
|
|
|
|
|||||
|
50 |
|
|
|
60 |
|||||
|
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
||
71 |
|
|
40 |
|
|
|
|
|
55 |
|
|
|
|
|
|
|
|
|
|
||
70 |
|
|
30 |
|
|
|
|
fIN = 20.1 MHz |
|
|
|
|
|
|
|
|
|
50 |
|
||
|
|
|
−60 |
−50 |
−40 |
−30 |
−20 |
−10 |
0 |
|
|
G067 |
|
|
|
Input Amplitude − dBFS |
|
|
G068 |
||
|
|
|
|
|
|
|
|
|
||
Figure 73. |
Figure 74. |
PERFORMANCE vs CLOCK AMPLITUDE |
PERFORMANCE vs INPUT CLOCK DUTY CYCLE |
|
96 |
|
|
|
|
72.0 |
|
|
96 |
|
94 |
|
|
SNR |
|
71.5 |
|
|
94 |
|
|
|
|
|
|
|
|
|
|
|
92 |
|
|
|
|
71.0 |
|
|
92 |
− dBc |
90 |
|
|
SFDR |
|
70.5 |
dBFS |
− dBc |
90 |
|
|
|
|
|
|
||||
88 |
|
|
|
|
70.0 |
88 |
|||
SFDR |
|
|
|
|
SNR − |
SFDR |
|||
86 |
|
|
|
|
69.5 |
86 |
|||
|
84 |
|
|
|
|
69.0 |
|
|
84 |
|
82 |
|
|
|
|
68.5 |
|
|
82 |
|
80 |
fIN = 20.1 MHz |
|
|
68.0 |
|
|
80 |
|
|
|
|
|
|
|
|
|||
|
0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
3.0 |
|
|
|
|
|
|
Input Clock Amplitude − V PP |
|
|
G069 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
72.0 |
|
|
|
|
SFDR |
|
|
|
|
71.5 |
|
|
|
|
|
|
|
|
|
71.0 |
|
|
|
|
|
SNR |
|
|
|
70.5 |
− dBFS |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
70.0 |
|
|
|
|
|
|
|
|
|
69.5 |
SNR |
|
|
|
|
|
|
|
|
69.0 |
|
|
fIN = 10.1 MHz |
|
|
|
|
68.5 |
|
||
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
68.0 |
|
30 |
35 |
40 |
45 |
50 |
55 |
60 |
65 |
70 |
|
|
|
|
Input Clock Duty Cycle − % |
|
|
|
G070 |
||
|
|
|
|
|
|
|
|
|
|
Figure 75. |
Figure 76. |
PERFORMANCE IN EXTERNAL REFERENCE MODE
|
95 |
fIN = 20.1 MHz |
|
|
|
|
78 |
|
||
|
|
|
|
|
|
|
|
|||
|
|
External Reference Mode |
|
|
|
|
|
|||
|
93 |
|
|
|
|
|
|
|
76 |
|
− dBc |
|
|
|
|
|
SFDR |
|
|
|
dBFS |
91 |
|
|
|
|
|
|
|
74 |
||
|
|
|
|
|
|
|
|
|
||
SFDR |
89 |
|
SNR |
|
|
|
|
|
72 |
SNR − |
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
||
|
87 |
|
|
|
|
|
|
|
70 |
|
|
85 |
|
|
|
|
|
|
|
68 |
|
|
1.30 |
1.35 |
1.40 |
1.45 |
1.50 |
1.55 |
1.60 |
1.65 |
1.70 |
|
|
|
|
|
VVCM − VCM V oltage − V |
|
|
|
G072 |
||
|
|
|
|
|
|
|
|
|
|
|
Figure 77.
36 |
Submit Documentation Feedback |
Copyright © 2007–2008, Texas Instruments Incorporated |
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122
